ICS-554
・Available in 1, 2 or 4 channel versions with or without DDCs
・Up to 105 MHz simultaneous sampling of all channels
・Internal or external clock and trigger
・> 72 dB signal-to-noise ratio
・> 85 dB spurious free dynamic range
・1 MByte onboard memory storage
・User programmable 3 million gate Xilinx FPGA
・Uncommitted Pn4 user I/O PMC interface
・Sensor Processing Resource Center
この製品は「生産中止品(EOL)」です。
在庫についてはお問い合わせください。
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