FMC210
・FPGA Mezzanine Card (FMC) per VITA-57
・Single width
- Reference clock
- Trig in/out
- General purpose I/O
・Super low phase noise RF PLL Synthesizer
・RoHS compliant
・Single ADC @2.5 GSPS
・5 GHz Full Power Input Bandwidth (-3dB)
・True single core architecture (no calibration required)
・External Interleaving:
- Gain Adjust
- Offset Adjust
- Sampling Delay Adjust
・Full scale analog input Voltage Span 500mVpp
・All front panel input/outputs are via MMCX:
- Analog Input
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