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CHAMP-WB-DRFM Digital RF Memory Card Set

メーカー
Curtiss-Wright
製品カテゴリ
FPGA
規格/フォームファクター
OpenVPX
用途
防衛

・OpenVPX™ (VITA 65) profile MOD6-PAY-4F-10..3.1-x; MOD6-PER-1Q-10.3.5-2, VPX REDI (VITA 48 option)
・Single user-programmable Xilinx Virtex-7 FPGAs (X690T), with
  ・8 GB DDR3L SDRAM in two banks
  ・Four 4-lane serial data plane links to the backplane (support up to 10.3 Gbps data rates)
   ・Gen2 SRIO, Aurora or alternate fabrics with different FPGA cores
  ・One 4-lane Gen3 PCIe connection to a Gen3 PCIe switch
  ・One additional x4 10.3 Gbps link to the backplane
  ・16 LVDS pairs to the backplane
・Onboard PCIe Gen3 switch - Two 8-lane expansion plane fabric ports to the backplane with configurable NTB support
・12 GS/s 8-bit ADC and 12 GS/s 10-bit DAC from Tektronix
・Thermal sensors for monitoring board power consumption
・Support for ChipScope Pro and JTAG processor debug interfaces
・Backplane clock/sync paths to mezzanines sites and FPGA
・FXTools BSP and FPGA design kit with highly-optimized IP Blocks, development environment, reference designs, scriptable simulation test benches and software libraries VxWorks and Linux variants available
・VITA 48 1” pitch format
・Ruggedization levels
  ・Air-cooled Level 0 (commercial)
  ・Conduction-cooled Level 200 (future)
・Path to variant with Processor (contact factory)

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