AMC520
FPGAモジュール / AdvancedMC
・Double width per μTCA.4 ・Ten channel of ADC with 125MSPS @ 16-bit resolution utilizing AD9268 device ・Dual 1GbE via SFP ・Dual DAC with 250 MSPS @ 16-bit resolution utilizing MAX5878 ・Internal clock or precision external clock from either RTM or back plane clocks ・Trig in/out configurable by software (external trigger via front, RTM or port 17) ・PC…
CHAMP-FX2 6U VPX Virtex-5, 8641D
FPGAモジュール / OpenVPX
・6U VPX-REDI ・Two Xilinx Virtex-5 Platform FPGAs (LX110T or LX220T) ・512 Mbytes or 1 GB DDR2 SDRAM per FPGA in two banks (1-2 Gbyte total on-board), 4.4 GBytes/sec peak bandwidth per FPGA ・36 Mbytes QDR-II+ SRAM per FPGA in four banks (72 Mbytes total on-board), 8.8 GBytes/sec peak bandwidth per FPGA ・4-lane RocketIO connection between the two FPGA…
AMC516
FPGAモジュール / AdvancedMC
・AMC FPGA carrier for FPGA Mezzanine Card (FMC) per VITA-57 ・Xilinx Virtex-7 690T FPGA in FFG-1761 package ・AMC Ports 4-11 are routed to FPGA per AMC.1, AMC.2 and AMC.4 (protocols such as PCIe, SRIO, XAUI, etc. are FPGA programmable) ・AMC Ports 12-15 and 17-20 are routed to the FPGA
FMC223
FPGAモジュール / FMC
・FPGA Mezzanine Card (FMC) per VITA-57 ・Single width ・Single DAC 14-bit at 2.5 GSPS ・2Vpp Differential Analog Output Swing ・Programmable DSP Clock ・Multi I/O LVDS input for Trig input, user defined, clock input, etc.
VPF2 6U VXS Virtex-5, 8641
FPGAモジュール / PMC/XMC
・Freescale Power Architecture MPC8641D ・Dual Xilinx Virtex-5 (LX110T/SX95T) FPGAs ・6U VXS/VITA 41 high-speed interconnect fabric ・XMC/PMC site latest generation local I/O ・Air or conduction cooled rugged versions
TS-PMC-4001
FPGAモジュール / PMC/XMC
・Available as bundled I/O, hardware and software development kit ・Micro-mezzanine I/O board allows for standard configuration and customization of I/O signals ・4 MBytes SRAM, 256 MBytes SDRAM, 64/66 MHz PCI interface ・Altera Stratix EP1S40-C5 FPGA delivers superior processing performance ・TS-PMC A40 FPGA PMC processor
AMC522 – μTCA.4 AMC Dual DAC, 16-bit @ 500 MSPS
FPGAモジュール / µTCA
・Ten or four channel ADC with 250 MSPS @ 16-bit resolution (option for lower sampling rate and 14-bit to reduce cost) ・Dual channel DAC with 500 MSPS @16-bit resolution ・Compliant to μTCA.4, double module with rear I/O ・Xilinx Kintex-7 FPGA
FMC102
FPGAモジュール / FMC
・FPGA Mezzanine Card (FMC) per VITA-57 ・Single width ・Two 10/100/1000 Mbit GbE ports ・Connection via two RJ-45 connectors ・RoHS compliant
HPE720 6U VPX
FPGAモジュール / OpenVPX
・6U VPX Hybrid Processor Board with dual Xilinx Virtex-5 FPGAs and a MPC8640D ・Dual Xilinx Virtex-5 FPGAs (LX220/330T or SX240T) ・Dual-core Freescale MPC8640D processor at 1.0 GHz ・Dual FPGA Mezzanine Card (FMC/VITA 57) sites OR 1 FMC and 1 XMC/PMC site ・Serial RapidIO connectivity ・6U VPX/VPX-REDI form factor ・Serial Rocket IO
AMC512
FPGAモジュール / FMC
・AMC FPGA carrier for FPGA Mezzanine Card (FMC) per VITA-57 ・Xilinx Virtex-5 FPGA in FF1136 package ・Up to 512 MB of FPGA DDR2 memory ・AMC Ports 4-7 and 8-11 routed to FPGA per AMC.1, AMC.2 and AMC.4 (FPGA programmable per protocol such as PCIe, 10 GbE or SRIO)